Vintage PC pages
Yamaha V6355D Video Chip
The V6355D is a video chip that emulates CGA and MDA displays. It's used in the Olivetti Prodest PC1 and in standalone video cards like the ACV-1030 video card. According to the data sheet, it can drive CRT monitors or LCD panels. I have only tested it in the PC1 and ACV-1030, in which cases it is always driving a CRT monitor.
vgamuseum.info has a data sheet available, which gives a summary of the chip's capabilities but doesn't describe what the registers do. However the manual for the Zenith Z-180 (pages 103-110) does have a fuller description of the chip's extra registers. My thanks to Simone Riminucci, who maintains a Facebook group for the PC1, for providing me with documentation describing the V6335D.
The technical reference manual for the TM-3034 TurbosPort computer includes a register-level description of the similar (but not compatible) V6366, which can provide insight into the designers' choices.
Note that the behaviour of the chip may be different in different systems, depending on the video card it is on. For example, the ACV-1030 has DIP switches which allow the type of monitor in use to be selected.
Registers
Emulation of the 6845 CRTC is partial - video is output at fixed timings and writes to CRTC registers 0-9 have no effect (the PC1 BIOS doesn't even bother to program them.)
The usual CGA mode control register at port 0x3D8 is extended to support two extra modes:
-------Mode register bits-----
Mode 6 5 4 3 2 1 0
--------------------------------------------------------
Text 40×25 0 blink 0 enable b/w 0 0
Text 80×25 0 blink 0 enable b/w 0 1
Graphics 160×200 1 n/a 0 enable b/w 1 0
Graphics 320×200 0 n/a 0 enable b/w 1 0
Graphics 640×200 b/w 0 n/a 1 enable b/w 1 any
Graphics 640×200 16 col 1 n/a 1 enable b/w 1 any
--------------------------------------------------------
Bit 7 is supposed to put the display controller into a low-power standby mode.
I have not been able to activate the two extra modes (160×200 and 640×200×16) on my PC1 or ACV-1030. The V6366 manual says that on that chip, the extra bits in the CGA mode control register can be locked out, and it's possible that the same thing has happened here.
In addition to the usual CGA registers, the V6355D has a bank of registers accessed through ports 0x3DD (register select) / 0x3DE (write data). According to the Z-180 manual (which matches my own observations), these extra registers are write only.
The selected register auto-increments after each write. So a sequence such as:
outportb(0x3DD, 0x42); /* select register 0x42 */ outportb(0x3DE, 0x05); /* write to register 0x42 */ outportb(0x3DE, 0x00); /* write to register 0x43 */
can be used to set multiple registers.
NB: When I tried to use the autoincrement to program a mouse pointer shape, I found that the same code worked reliably on the Prodest PC1 but led to random corruption on the ACV-1030. On the latter it proved necessary to select each register manually before programming it.
The registers thus accessed are:
0x00 - 0x1F: Mouse pointer AND mask.
Registers 0 and 1 define the first line, 2 and 3 define the
second line and so on. Bit 7 of the even-numbered register is
the leftmost pixel, bit 0 of the odd-numbered register is the
rightmost.
0x20 - 0x3F: Mouse pointer XOR mask.
Both pointer masks are initialised to 0 by the Prodest PC1 BIOS.
0x40 - 0x5F: Palette registers. These apply only to composite output (since
CGA digital output doesn't support multiple colour levels.
Even-numbered registers hold the red value in bits 0-2;
odd-numbered registers hold blue in bits 0-2, green in bits 4-6.
0x60: Mouse pointer X position - bit 0 is high bit, bits 7-1 unused.
0x61: Mouse pointer X position - low 8 bits
0x62: Not used
0x63: Mouse pointer Y position
The mouse pointer is positioned on a 512 × 256 grid, of
which 16 <= X <= 335 and 16 <= Y <= 215 correspond
to the visible screen. That is, the pointer is always positioned
using 320×200 resolution. The pointer starts at (0,0) which
is completely off the visible screen, so will not be drawn unless
it is moved onto the screen (and has its bitmap and other
registers set).
0x64: Bits 0-2 control mouse pointer visibility:
Bit 0: Pointer (if drawn) blinks
Bit 1: Apply pointer AND mask
Bit 2: Apply pointer XOR mask
Bits 3-5: Vertical adjustment (number of rows to move the screen up)
Bits 6,7: Reserved, leave as 0.
0x65: Monitor control register.
Bits 0,1: Screen height
0 => 192 lines
1 => 200 lines
2 => 204 lines
3 => 64 lines (LCD output only)
Bit 2: Display is 512 or 256 pixels wide rather than 640 / 320.
Text will output in 64 or 32 columns rather than 80 / 40.
Bit 3: Monitor type. 1 => PAL or SECAM (50Hz refresh),
0 => NTSC (60Hz refresh). On the PC1 the BIOS
initialises this to PAL/SECAM; the supplied utility
CRT.COM changes it to NTSC.
Bit 4: Set to use MDA monitor. I tested this with a PC1 and an
MDA-compatible monitor, with indifferent results; the
monitor synced to the signal (when monitor type was set
to NTSC) but with grey background, blurred text and
visible retrace lines.
Bit 5: Set to use LCD panel.
Bit 6: Set to use static RAM for video RAM. If activated on
a system like the PC1 (which uses dynamic video RAM)
the screen will display solid 0xFF bytes, and the
contents of video RAM may be corrupted as they are no
longer being refreshed.
Bit 7: Pointing device type: 0 => light pen, 1 => mouse.
The PC1 BIOS and utilities always set this to 1.
0x66: Display Control Register.
Bits 0-1: Adjust LCD vertical position (multiply by 2 to get offset)
Bits 2-3: Select LCD driver type:
0=> Dual, 1 bit serial
1=> Dual, four bit parallel
2,3=> Dual, four bit intensity
Bits 4-5: LCD driver shift clock frequency
Bit 6: Text attributes are treated as MDA rather than CGA, and
displayed in greyscale (though the screen border remains in
colour)
Bit 7: If set, underlines are drawn on characters with blue
foreground.
0x67: Configuration Mode Register.
Bits 0-4 adjust horizontal position of display.
Bit 5 adjusts LCD control signal period.
Bit 6 enables 4-page video RAM (if present)
Bit 7 enables 16-bit bus operation. If set on a system with
an 8-bit bus, results in the controller only being able
to access odd-numbered bytes of video RAM.
0x68: Mouse pointer colour.
The low 4 bits control which RGBI lines the AND shape masks off
(bit 0 => blue, bit 1 => green, bit 2 => red, bit 3 => intensity)
They would normally be set to 0, which causes the AND sprite to
mask out everything it passes over.
The high 4 bits control which RGBI lines the XOR shape toggles.
These would normally all be set to 1, but can be changed to give
the pointer a different colour.
The PC1 BIOS initialises this register to 0x0F, meaning that the
pointer is not drawn.
0x69: Control data register. Documentation is obscure.
On systems with 64k video RAM, port 0x3DF is used to select one of four 16k pages. I have not found documentation of the exact method used, since the Z180 did not support this configuration.
John Elliott 7 May 2025